Plasma display panels (hereinafter referred to as PDPs) display images in such a manner that ultraviolet rays generated by gas discharge excite phosphor material to emit light. The PDPs are classified into two groups based on discharge methods: AC PDPs and DC PDPs. The AC PDPs are superior to the DC PDPs in luminance, luminous efficiency, and duration of life. Above all, reflective surface discharge AC PDPs have become the most popular, because the PDPs of this kind stand out both in the luminance and luminous efficiency.
FIG. 9 is a perspective view illustrating an overview of a PDP unit 10 of a conventional AC PDP. The PDP unit 10 is structured such that discharge cells, each emitting red, green, or blue light, are disposed in lines in an order of colors.
A plurality of pairs of ribbon-shaped transparent electrodes 241 and 251 (made of such as ITO and SnO2) are formed on a front panel glass 21 made of soda lime glass and such. Because sheet resistance of the transparent electrodes 241 and 251 is high, bus electrodes 242 and 252 are formed, in order to reduce the seat resistance, on the transparent electrodes 241 and 251, respectively. The bus electrodes 242 and 252 are formed by such films as silver films, aluminum films, or Cr/Cu/Cr layered thin films. In the above manner, a plurality of pairs of display electrodes 24 and 25 (sustaining electrodes 24 or Y electrodes 24, and scanning electrodes 25 or X electrodes 25) are formed.
A dielectric layer 22 made of transparent low-melting glass and a protecting layer 23 made of magnesium oxide (MgO) are formed, in a stated order, over the front panel glass 21 on which the display electrodes 24 and 25 have been formed. The dielectric layer 22 has a current limiting function which is characteristic to the AC PDP, and this makes the duration of life longer in comparison with the DC PDPs. The protecting layer 23 is provided so as to protect the dielectric layer 22 from being sputtered when discharging. The protecting layer 23 has a high anti-spattering property and a high secondary-emission coefficient (γ), and lowers a discharge start voltage.
A plurality of address electrodes 32 (data electrodes 32; DAT) for writing image data are formed in stripes on a back panel glass 31 so as to become orthogonal to the display electrodes 24 and 25. A base dielectric layer 33 is formed on a surface of the back panel glass 31 so as to cover the data electrodes 32. On a surface of the base dielectric layer 33, a plurality of barrier ribs 34 are formed along the data electrodes 32. Red phosphor layers 35, green phosphor layers 36, and blue phosphor layers 37 are each disposed between two adjacent barrier ribs 34.
Commonly used material for the phosphor layers of each color is as follows.
Red phosphor:(YXGd1−X)BO3:Eu3+ or YBO3:Eu3+Green phosphor:BaAl12O19:Mn or Zn2SiO4:MnBlue phosphor:BaMgAl10O17:Eu2+
Spaces surrounded by two adjacent barrier ribs 34 are discharge spaces 38R, 38G, and 38B. A mixture of Neon (Ne) and Xenon (Xe) as a discharge gas is filled in the discharge spaces at a pressure of 66.5 kPa (500 Torr). The barrier ribs 34 also serve as partitions between adjacent discharge cells so as to prevent an improper discharge and an optical cross talk.
Images are displayed in a following manner. An AC voltage of approximately several tens kHz to several hundreds kHz is applied between the pair of the display electrodes 24 and 25, and the discharge is caused in the discharge spaces 38R, 38G, and 38B. Then, Xenon atoms are excited by the discharge and emit ultraviolet rays. The ultraviolet rays excite the phosphor layers 35, 36, 37 to emit visible light, and thus the images are displayed.
Next, a PDP driving unit 40 for driving the PDP unit 10 is explained below.
FIG. 10 is a schematic view illustrating a configuration of the display electrodes 24 and 25, and the data electrodes 32, as well as a connection between the PDP driving unit 40 and the electrodes. M rows of data electrodes 32 and AT columns of pairs of display electrodes (the sustaining electrodes 24 and the scanning electrodes 25) are disposed so as to form an M×N matrix as a total. The discharge cells correspond to areas in the discharge spaces 38R, 38G, and 38B where the data electrodes 32 and the display electrodes face each other.
The PDP driving unit 40 illustrated in FIG. 10 comprises a data driver IC403 connected to each of the data electrodes 32, a sustaining driver IC402 connected to each of the sustaining electrodes 24, a scanning driver IC401 connected to each of the scanning electrodes 25, and a driving circuit 400 that controls the drivers IC401–IC403. The drivers IC401, IC402, and IC403 control electrical flow to the electrodes 25, 24, and 32, respectively. The driving circuit 400 controls overall operation of the drivers IC401, IC402, and IC403, and displays screens in the PDP unit 10 appropriately. The driving circuit 400 includes (a) a storing unit for storing image data that is inputted from outside of the PDP unit 10 for a predetermined period of time, and (b) a circuit for retrieving the stored image data sequentially and performing image processing such as gamma correction.
Note that actual numbers of drivers IC401–IC403 may vary depending on how many electrodes are disposed in the PDP unit.
FIG. 11 is a timing chart of driving waveform when driving the PDP unit 10.
The plasma display device, comprising the PDP unit 10 and the PDP driving circuit 40, displays grayscale with a field including subfields from a first through n-th. Each subfield includes at least a write period and a sustain period when driving. The timing chart in FIG. 11 illustrates the driving waveform in a (m−1)-th subfield and a m-th subfield. Both m and n are any given integers. An example in FIG. 11 includes subfields having at least either of an initialization period or an erase period. Numbers of pulses applied to the scanning electrodes 25 and the sustaining electrodes 24 during the sustain period may vary according to the grayscale.
An operation in the m-th subfield is as follows, for example.
First, in the initialization period, an initializing pulse is applied to the scanning electrodes (SCN) as shown in FIG. 11. In this period, the sustaining electrodes (SUS) and the data electrodes (DAT) are grounded. By applying a voltage having the driving waveform whose amplitude increases gradually, a gradually increasing voltage is applied to the scanning electrodes 25. After that, while a voltage is applied to the sustaining electrodes 24, a gradually decreasing voltage is applied to the scanning electrodes 25. Thus wall charge in the cells is initialized.
Then, in the write period, in order to display a first row in the M×N matrix, a first write pulse (Vb) is applied to a first row of the scanning electrodes 25 and a second write pulse (Vdat) is applied to a data electrode 32 corresponding to a discharge cell. By the above voltage application, a writing discharge (an address discharge) is generated between the scanning electrode in the first row and the corresponding data electrode 32, the wall charge is formed on a surface of the dielectric layer 22, and writing to the first row is carried out.
When the above operation is completed to a N-th row, the writing process is done, and a latent image is written for one screen.
Next, in the sustain period, with all of the data electrodes grounded, a sustaining pulse voltage (Vs) is applied to all of the sustaining electrodes 24, then to all the scanning electrodes 25. After that, the sustaining pulse voltage (Vs) is applied alternately to the sustaining electrodes 24 and the scanning electrodes 25. Accordingly, light emission caused by a sustain discharge is maintained in the cells at which writing has been carried out during the write period, and an actual screen is displayed.
After this, in the erase period, the wall charge is removed by applying the gradually decreasing voltage to the scanning electrodes 25.
The images are displayed in the PDP unit 10 in the above manner.
However, the conventional driving method explained in the above has the following problem.
In general, voltage resistance of a data driver IC used for the PDP driving unit 40 is relatively low, and accordingly, the write pulse applied during the write period is not secured sufficiently in some cases. In a case of the plasma display device whose discharge start voltage (Vf) is relatively high, there is a possibility that the voltage applied by the write pulse does not reach the discharge start voltage and the data writing becomes unstable. This could result in degradation of image quality such as flickering and failure in lighting.
Especially, plasma display devices having a high-resolution cell structure, such as hi-vision plasma display devices, are susceptible to the above noted problem. Specifically, when driving the plasma display devices of this kind, it is required to make time length of subfields shorter than usual in order to complete the discharge within a short write pulse period, and it is said that a driving voltage to the data electrodes needs to be set higher in comparison with a case of VGA standard plasma display devices. Thus, the low voltage resistance of the data driver IC could also be a major problem.
Moreover, each of the red, green, and blue phosphor layers used for a PDP unit has a different chemical property. Accordingly, the write pulse of each of the discharge cells varies according to the colors of the phosphor layers even when the same amount of power is supplied, and a discharge ratio (lighting efficiency) of each of the discharge cells also varies according to the colors. While it is possible to set the driving voltage to the data electrodes 32 as high as possible in order to avoid effects of the variation in the write pulse, i.e. the driving voltage is set at the write pulse of the cell that has a best lighting efficiency, the low voltage resistance of the data driver IC is still a problem.
One solution to the above problem is to use ICs having a high-voltage resistance for the data driver IC. However, using the ICs of this kind should be avoided, because the ICs having the high voltage resistance are generally expensive and will increase costs for the plasma display devices. Moreover, even if such high output diver ICs are employed, it can lead to a new problem that power consumption of the plasma display device increases. Therefore, this solution is not desirable, considering the recent trend that display size has become increasingly larger.